Apogee Semiconductor AP54RHC420 Latch
Apogee Semiconductor AP54RHC420 Latch is radiation-hardened by design, a dual quad-SR latch with cold sparing and Schmitt trigger inputs. This latch delivers high resiliency to single-event effects (SEE) and total ionizing dose (TID). The AP54RHC420 latch features 5ns transient detection at VCC > 3V and single-supply level translation. This latch support inputs and/or outputs, which can be cross-strapped with no impact on operation or leakage current, simplifying cold-sparing implementation. The AP54RHC420 latch also supports a redundant output stage with high drive capability and low static power loss. This latch is ideally suited for commercial spaces and other applications that demand radiation tolerance and high reliability. Typical applications include system-level glitch latching, power supply transient detection, single-bit latching, and discrete state machines.
Features
- 5ns transient detection at VCC > 3V
- SEL/SEFI/SET immune to LET of 75MeV-cm2/mg
- 1.4V to 5.5V operation
- Schmitt triggers on inputs
- Cold sparing inputs and outputs
- Single-supply Level Translation
- TID RLAT 30 krad (Si) at 5.5V
- -55°C to 125°C operating temperature range
- Meets NASA ASTM E595 outgassing specification
- Moisture Sensitivity Level (MSL) 1 (unlimited)
Applications
- System-level glitch latching
- Power supply transient detection
- Fault Detection, Isolation, and Recovery (FDIR)
- Single-bit latching
- Discrete state machines
- SEE fault detection in non-rad hard components
Specifications
- Absolute maximum ratings:
- -0.5V to 5.5V supply voltage range
- -0.5V to 5.5V input voltage range
- -0.5V to 5.5V output voltage range
- 100mA input clamp current
- 100mA continuous output current (per pin)
- 100mA maximum supply current
- ESD voltage:
- 1000V HBM
- 500V CDM
- -55°C to 150°C operating junction temperature range
- -65°C to 150°C storage temperature range
Logic Diagram
Dimensions
